Arbitration device to adsl code sharing in adsl subscriber board

专利摘要:
PURPOSE: An arbitration device for sharing an ADSL(Asymmetric Digital Subscriber Line) code in an ADSL subscriber board is provided to read the ADSL code stored in a booting/storing flash memory using an arbitration logic embodied in an EPLD(Erasable Programming Logic Device), store the read ADSL code in an external SRAM, and read and write the corresponding ADSL code using a pair of quad-type ADSL DSPs(Digital Signal Processors). CONSTITUTION: A booting/storing flash memory(100) boots an entire board, and temporarily stores an ADSL code in a memory region of an empty space. A host processor(200) receives ADSL data, and outputs the received ADSL data to an upper terminal. An EPLD(300) receives a control signal from the host processor(200), reads the ADSL code temporarily stored in the booting/storing flash memory(100), and outputs the read ADSL code. An external SRAM(400) receives the ADSL code from the EPLD(300) through an internal bus, and stores the received ADSL code. A pair of quad-type ADSL DSPs(500) output an SRAM request signal, connect to the external SRAM(400), read the corresponding ADSL code among ADSL codes stored in the external SRAM(400), and perform a processing operation corresponding to the read ADSL code. The pair of quad-type ADSL DSPs(500) receive ADSL data, and output the received ADSL data.
公开号:KR20020083589A
申请号:KR1020010022986
申请日:2001-04-27
公开日:2002-11-04
发明作者:이성구
申请人:현대네트웍스 주식회사；
IPC主号:

专利说明:

ARBITRATION DEVICE TO ADSL CODE SHARING IN ADSL SUBSCRIBER BOARD}
[6] The present invention relates to an arbitration apparatus for sharing an ASD code in an Asymmetric Digital Subscriber Line (ADSL) subscriber board. More particularly, the present invention relates to an erasable programming logic device (EPLD) for mediation for ADSL code sharing. The ADSL code temporarily stored in the boot / storage flash memory is read and stored as an external S-RAM by using the arbitration logic implemented in the above, and a pair of quad ADSL Digital Signal Processors (DSPs) is called. The present invention relates to an arbitration apparatus for sharing an ADSL code on an ADSL subscriber board, which makes it possible to read / write the corresponding ADSL code by using a.
[7] Conventional ADSL subscriber boards have their own flash memory for each of the eight ADSL DSPs, and then write and assemble the ADSL code corresponding to each flash memory with flash ROM write, and then, if each ADSL DSP is required, In order to access the dedicated flash memory every time, a specific address was floated through the address line and connected to a desired memory area, and at the same time, the ADSL code stored in the dedicated flash memory was read / written through 16 data lines.
[8] However, in the conventional ADSL subscriber board as described above, a part of the ADSL code written to the flash memory is damaged or is incorrect during the test during ICT (In Circuit Test; ICT) during the process of mass production. Is not able to operate normally when it is written to flash memory, and it is difficult to increase subscribers in the same board in the future, and up to 8 flash memories are used which greatly affects the increase of channel cost, line cost, and board cost. As a result, production efficiency is lowered due to difficulty in purchasing parts during mass production.In addition, each flash memory needs to be upgraded in a daisy-chain form when upgrading the ADSL code. If it is damaged, you will need to upgrade manually afterwards. There was a slippery problem.
[9] Accordingly, the present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to accommodate more subscribers on one board through the sharing of ADSL codes, and to easily upgrade the ADSL codes, and to produce errors during mass production. The present invention provides an arbitration apparatus for sharing an ADSL code in an ADSL subscriber board that can minimize occurrence.
[10] In order to achieve the above object, an arbitration apparatus for sharing an ADSL code in an ADSL subscriber board of the present invention uses an ADSL code such as link establishment, subscriber connection and management, OAM, etc., while storing the entire boot and program of the board. A boot / storage flash memory for temporarily storing in an empty memory area;
[11] A host processor for outputting various control signals and outputting the ADSL data to an upper stage when the ADSL data is input;
[12] An EPLD that receives the control signal from the host processor and simultaneously reads and outputs the ADSL code temporarily stored in the boot / store flash memory;
[13] An external S-RAM receiving an ADSL code from the EPLD via an internal bus and simultaneously storing the ADSL code;
[14] Outputs an S-RAM request signal and is connected to the external S-RAM, reads the corresponding ADSL code among the ADSL codes stored in the external S-RAM, performs a corresponding processing operation, and simultaneously receives ADSL data. A pair of quad ADSL DSPs for outputting the ADSL data; And
[15] An ADSL transceiver is connected between the host processor and a pair of quad ADSL DSPs to interface ADSL data.
[1] 1 is a functional block diagram showing a configuration of an arbitration apparatus for sharing an ASD code in an ADSL subscriber board according to an embodiment of the present invention.
[2] <Explanation of symbols for the main parts of the drawings>
[3] 100: boot / store flash memory 200: host processor
[4] 300: EPLD 400: External S Ram
[5] 500: Quad ADSL DSP 600: ADSL Transceiver
[16] Hereinafter, an arbitration apparatus for sharing an ASD code in an ADSL subscriber board according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.
[17] 1 is a functional block diagram of an arbitration apparatus for sharing an ADSL code in an ADSL subscriber board according to an embodiment of the present invention, and for sharing the ADSL code in an ADSL subscriber board according to an embodiment of the present invention. The arbitration device includes a booting / storage flash memory 100, a host processor 200, an EPLD 300, an external SRAM 400, a pair of quad ADSL DSPs 500, And an ADSL transceiver 600.
[18] The boot / storage flash memory 100 stores the entire boot and program of the board, and does not use an ADSL code such as link setting, subscriber connection and management, and OAM (Operation And Management). The boot / storage flash memory 100 is composed of two memories of even and add of 16M each.
[19] In addition, the host processor 200 outputs various control signals to the EPLD 300, and when the ADSL data of the subscriber is input from the ADSL transceiver 600, the host processor 200 outputs the ADSL data to the upper stage and the higher stage. When the ADSL data is received from the stage, the ADSL data is output to the ADSL transceiver 600.
[20] The EPLD 300 receives various control signals from the host processor 200 and performs arbitration logic corresponding thereto, and then reads the ADSL codes temporarily stored in the boot / store flash memory 100. It serves to output to the external S RAM 400 through an internal bus.
[21] Here, the EPLD 300 arbitrates logic to share the ADSL code between the pair of quad ADSL DSPs 500 and the external SRAM 400 and the boot / store flash memory 100. It is implemented therein, the signals input and output to the arbitration logic in the EPLD (300) is largely the address line, data line, read signal, write signal, chip select signal connected to the host processor 200 The signal connected to the pair of quad type ADSL DSP 500 includes an IDMA read signal, an IDMA write signal, an IDMA address latch signal, an IDMA select signal, a reset signal, and the pair of quad type ADSL DSPs 500. Interrupt processing signals from four DSPs in the SMC, S RAM request signals for connecting the external S RAM 400, bus request signals that are internal bus connection request signals connected to the external S RAM, and internal bus connection permission signals. A bus grant (Bus Grant) is a combination of light and they are implemented through the circuit in the EPLD (300).
[22] In addition, the external S-RAM 400 receives the ADSL code from the EPLD 300 through the internal bus and simultaneously stores the ADSL code.
[23] The pair of quad type ADSL DSP 500 outputs an S-RAM request signal and is connected to the external S-RAM 400 to read a corresponding ADSL code among the ADSL codes stored in the external S-RAM 400. At the same time, the ADSL data is outputted to the ADSL transceiver 600 when the ADSL data is received from the subscriber, and the ADSL data is received from the ADSL transceiver 600. It outputs to subscriber.
[24] In addition, the ADSL transceiver 600 is connected between the host processor 200 and a pair of quad ADSL DSPs 500 to serve to interface ADSL data.
[25] Next, an arbitration apparatus for sharing the ASD code in the ADSL subscriber board having the above configuration will be described.
[26] First, the boot / storage flash memory 100 stores booting and programs of the entire board, and temporarily stores them in a memory area of an empty space that does not use ADSL codes such as link setting, subscriber connection and management, and OAM.
[27] Subsequently, the host processor 200 outputs various control signals to the EPLD 300 and outputs the ADSL data to the upper stage when the ADSL data of the subscriber side is input from the ADSL transceiver 600. When the ADSL data is received from the stage, the ADSL data is output to the ADSL transceiver 600.
[28] Then, the EPLD 300 receives various control signals from the host processor 200 and performs arbitration logic corresponding thereto, and then reads the ADSL codes temporarily stored in the boot / store flash memory 100. Outputs to the external S RAM 400 through an internal bus.
[29] For reference, the EPLD 300 includes an address line, a data line, a read signal, a write signal, a chip select signal, an interrupt processing signal, an IDMA read signal, an IDMA write signal, an IDMA address latch signal, an IDMA select signal, a reset signal, and an interrupt. Arbitration logic is implemented by combining processing signals, S-RAM request signals, bus request signals, and bus grant signals.
[30] Then, the pair of quad ADSL DSP 500 outputs an S-RAM request signal and is connected to the external S-RAM 400, and then reads a corresponding ADSL code among the ADSL codes stored in the external S-RAM 400. At the same time, the corresponding processing operation is performed.
[31] As described above, the arbitration apparatus for sharing the ADSL code in the ADSL subscriber board according to the present invention is not limited to the above-described embodiments, and is within the scope of the present invention without departing from the scope of the present invention. It can be applied to a general purpose, such as xDSL system, such as a system, a VDSL (Very-high-speed Digital Subscriber Line) system.
[32] As described above, according to the arbitration apparatus for sharing the ADSL code in the ADSL subscriber board according to the present invention, the ADSL code is temporarily stored in the boot / store flash memory using the arbitration logic implemented in the EPLD during the arbitration for the ADSL code sharing. It can be stored in an external S-RAM and then read / write the corresponding ADSL code using a pair of quad ADSL DSPs to accommodate more subscribers on one board. Not only is this easy, it has the outstanding effect of saving time and minimizing the occurrence of errors during mass production.
[33] In addition, by not using the flash memory, which is a phenomenon that bears worldwide, not only can the product production efficiency be improved during mass production, but also the cost can be significantly reduced.

权利要求:
Claims (2)
[1" claim-type="Currently amended] A boot / storage flash memory that stores booting and programs of the entire board and temporarily stores in a memory area of an empty space that does not use ADSL codes such as link establishment, subscriber connection and management, and OAM;
A host processor for outputting various control signals and outputting the ADSL data to an upper stage when the ADSL data is input;
An EPLD that receives the control signal from the host processor and simultaneously reads and outputs the ADSL code temporarily stored in the boot / store flash memory;
An external S-RAM receiving an ADSL code from the EPLD via an internal bus and simultaneously storing the ADSL code;
Outputs an S-RAM request signal and is connected to the external S-RAM, reads the corresponding ADSL code among the ADSL codes stored in the external S-RAM, performs a corresponding processing operation, and simultaneously receives ADSL data. A pair of quad ADSL DSPs for outputting the ADSL data; And
And an ADSL transceiver connected between the host processor and a pair of quad ADSL DSPs for interfacing ADSL data to an ADSL code sharing device.
[2" claim-type="Currently amended] The method of claim 1,
The EPLD has an arbitration logic for sharing ADSL code between the pair of quad ADSL DSPs and an external SRAM and boot / store flash memory. Mediation device for sharing.

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引用文献:

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公开号 | 申请日 | 公开日 | 申请人 | 专利标题

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法律状态:
2001-04-27|Application filed by 현대네트웍스 주식회사

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2001-04-27|Priority to KR1020010022986A

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2002-11-04|Publication of KR20020083589A

优先权:

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申请号 | 申请日 | 专利标题

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KR1020010022986A|KR20020083589A|2001-04-27|2001-04-27|Arbitration device to adsl code sharing in adsl subscriber board|